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Signal integrity

  • Experience of handling prelayout & postlayout designs/topologies helps
           customer to first time right designs.
  • Successfully executed complex Multidrop/Multipoint topologies.
  • Asserting PCB layer stackup/Layer ordering/PCB materials based on SI results.
  • Validating the logic level, Drive strengths, Termination techniques,
           Thresholds, Over/Under shoot, Propagation Delay, Noise margin etc., Slew
           Rate, Timing Budget(setup/Hold time), EYE Diagram.
  • BER, ISI, Jitter, Loss(IL,RL) analysis.
  • Cross talk analysis and mitigation methodologies.
  • SerDes/DDRx/XAUI/PCIe interfaces.
  • Handled upto 12.5Gb speed.
Signal integrity